* improved draft of board layout
This commit is contained in:
parent
fd6d930dd7
commit
1ea7393eb0
2 changed files with 369 additions and 9 deletions
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@ -1,14 +1,12 @@
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unnamed_net3 D1-1 L1-2
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unnamed_net2 R1-2 Q1-2
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CURRENT_CONTROL_LOW R2-2 Q1-1
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unnamed_net1 D2-1 L1-1 Q1-3
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GND_LED U?-? D1-2 D2-2
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GND_LED D1-2 D2-2
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PWM_LED R1-1 CONF-3
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CURRENT_CONTROL_HIGH R2-1 CONF-1
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GND_uC COMM_BUS-5 COMM_BUS-6 COMM_BUS-4 CONF-15 CONF-13 CONF-11 CONF-9 CONF-7 CONF-5 uC-14
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uC_CONF_SERIAL COMM_BUS-3 uC-13
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CURRENT_CONTROL_H uC-12
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CURRENT_CONTROL_L uC-11
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VCC_HIGH R2-1 CONF-1 uC-12
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CURRENT_CONTROL_LOW R2-2 Q1-1 uC-11
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uC_CONF_E CONF-16 uC-10
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uC_CONF_D CONF-14 uC-8
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SCL COMM_BUS-1 uC-9
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@ -1,19 +1,19 @@
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# release: pcb 20091103
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# date: Fri Dec 18 18:33:35 2009
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# date: Fri Dec 18 23:33:14 2009
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# user: lars (,,,)
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# host: erker
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# To read pcb files, the pcb version (or the cvs source date) must be >= the file version
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FileVersion[20070407]
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PCB["" 600000 500000]
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PCB["" 210000 140000]
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Grid[1000.000000 0 0 0]
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Grid[10000.000000 0 0 1]
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Cursor[0 0 0.000000]
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PolyArea[200000000.000000]
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Thermal[0.500000]
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DRC[1000 1000 1000 1000 1500 1000]
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Flags("nameonpcb,uniquename,clearnew,snappin")
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Flags("shownumber,rubberband,nameonpcb,clearnew,snappin,liveroute")
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Groups("1,c:2,s:3:4:5:6:7:8")
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Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
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@ -797,11 +797,264 @@ Symbol('~' 12)
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SymbolLine(15 35 20 35 8)
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SymbolLine(20 35 25 30 8)
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)
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Via[170000 90000 5600 2000 0 2000 "" ""]
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Via[200000 20000 5600 2000 0 2000 "" "found"]
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Via[100000 30000 5600 2000 0 2000 "" ""]
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Via[180000 130000 5600 2000 0 2000 "" ""]
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Element["" "HEADER2_1" "POWER_IN" "unknown" 10000 50000 -1000 -15000 1 100 ""]
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(
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Pin[0 0 6000 3000 6600 3800 "1" "1" "square"]
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Pin[0 -10000 6000 3000 6600 3800 "2" "2" "found"]
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ElementLine [-5000 -5000 5000 -5000 1000]
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ElementLine [5000 -5000 5000 5000 1000]
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ElementLine [-5000 -15000 -5000 5000 1000]
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ElementLine [-5000 -15000 5000 -15000 1000]
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ElementLine [5000 -15000 5000 5000 1000]
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ElementLine [-5000 5000 5000 5000 1000]
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)
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Element["" "TO92" "Q1" "BC557" 50000 70000 1000 -13000 0 100 ""]
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(
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Pin[20000 0 7200 3000 7800 4200 "E" "1" "found,square,edge2"]
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Pin[10000 0 7200 3000 7800 4200 "B" "2" "edge2"]
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Pin[0 0 7200 3000 7800 4200 "C" "3" "found,edge2"]
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ElementLine [3000 -7000 17000 -7000 1000]
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ElementArc [10000 0 10000 10000 315 270 1000]
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)
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Element["" "HEADER2_1" "D1" "unknown" 10000 70000 5000 21000 2 100 ""]
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(
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Pin[0 0 6000 3000 6600 3800 "1" "1" "square"]
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Pin[0 10000 6000 3000 6600 3800 "2" "2" ""]
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ElementLine [-5000 5000 5000 5000 1000]
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ElementLine [-5000 -5000 -5000 5000 1000]
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ElementLine [5000 -5000 5000 15000 1000]
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ElementLine [-5000 15000 5000 15000 1000]
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ElementLine [-5000 -5000 -5000 15000 1000]
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ElementLine [-5000 -5000 5000 -5000 1000]
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)
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Element["" "ACY300" "L1" "100uH" 70547 99349 -24500 -4500 2 100 ""]
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(
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Pin[0 0 5500 3000 6100 3000 "1" "1" "found,square,edge2"]
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Pin[-30000 0 5500 3000 6100 3000 "2" "2" "edge2"]
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ElementLine [-7500 -2500 -7500 2500 1000]
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ElementLine [-22500 -2500 -7500 -2500 1000]
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ElementLine [-22500 -2500 -22500 2500 1000]
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ElementLine [-22500 2500 -7500 2500 1000]
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ElementLine [-30000 0 -22500 0 1000]
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ElementLine [-7500 0 0 0 1000]
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)
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Element["" "ACY300" "R2" "unknown" 60000 40000 -24500 -4500 2 100 ""]
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(
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Pin[0 0 5500 3000 6100 3000 "1" "1" "found,square,edge2"]
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Pin[-30000 0 5500 3000 6100 3000 "2" "2" "found,edge2"]
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ElementLine [-7500 -2500 -7500 2500 1000]
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ElementLine [-22500 -2500 -7500 -2500 1000]
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ElementLine [-22500 -2500 -22500 2500 1000]
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ElementLine [-22500 2500 -7500 2500 1000]
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ElementLine [-30000 0 -22500 0 1000]
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ElementLine [-7500 0 0 0 1000]
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)
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Element["" "HEADER2_1" "POWER_OUT" "unknown" 20000 50000 -1000 -15000 1 100 ""]
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(
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Pin[0 0 6000 3000 6600 3800 "1" "1" "square"]
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Pin[0 -10000 6000 3000 6600 3800 "2" "2" "found"]
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ElementLine [-5000 -5000 5000 -5000 1000]
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ElementLine [5000 -5000 5000 5000 1000]
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ElementLine [-5000 -15000 -5000 5000 1000]
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ElementLine [-5000 -15000 5000 -15000 1000]
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ElementLine [5000 -15000 5000 5000 1000]
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ElementLine [-5000 5000 5000 5000 1000]
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)
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Element["" "ACY300" "R1" "unknown" 90000 50000 -24500 -4500 2 100 ""]
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(
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Pin[0 0 5500 3000 6100 3000 "1" "1" "square,edge2"]
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Pin[-30000 0 5500 3000 6100 3000 "2" "2" "edge2"]
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ElementLine [-7500 -2500 -7500 2500 1000]
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ElementLine [-22500 -2500 -7500 -2500 1000]
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ElementLine [-22500 -2500 -22500 2500 1000]
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ElementLine [-22500 2500 -7500 2500 1000]
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ElementLine [-30000 0 -22500 0 1000]
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ElementLine [-7500 0 0 0 1000]
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)
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Element["" "HEADER16_2" "CONF" "unknown" 110000 40000 21000 -5000 3 100 ""]
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(
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Pin[0 0 6000 3000 6600 3800 "1" "1" "found,square"]
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Pin[10000 0 6000 3000 6600 3800 "2" "2" ""]
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Pin[0 10000 6000 3000 6600 3800 "3" "3" ""]
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Pin[10000 10000 6000 3000 6600 3800 "4" "4" ""]
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Pin[0 20000 6000 3000 6600 3800 "5" "5" ""]
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Pin[10000 20000 6000 3000 6600 3800 "6" "6" ""]
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Pin[0 30000 6000 3000 6600 3800 "7" "7" ""]
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Pin[10000 30000 6000 3000 6600 3800 "8" "8" ""]
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Pin[0 40000 6000 3000 6600 3800 "9" "9" ""]
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Pin[10000 40000 6000 3000 6600 3800 "10" "10" ""]
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Pin[0 50000 6000 3000 6600 3800 "11" "11" ""]
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Pin[10000 50000 6000 3000 6600 3800 "12" "12" ""]
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Pin[0 60000 6000 3000 6600 3800 "13" "13" ""]
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Pin[10000 60000 6000 3000 6600 3800 "14" "14" ""]
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Pin[0 70000 6000 3000 6600 3800 "15" "15" ""]
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Pin[10000 70000 6000 3000 6600 3800 "16" "16" ""]
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ElementLine [5000 -5000 5000 5000 1000]
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ElementLine [-5000 5000 5000 5000 1000]
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ElementLine [-5000 -5000 15000 -5000 1000]
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ElementLine [15000 -5000 15000 75000 1000]
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ElementLine [-5000 75000 15000 75000 1000]
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ElementLine [-5000 -5000 -5000 75000 1000]
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)
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Element["onsolder" "SOD80" "D2" "unknown" 30000 70000 3200 8400 2 100 "auto"]
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(
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Pad[-1600 5800 1600 5800 5300 2000 5900 "cathode" "1" "found,onsolder,square"]
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Pad[-1600 -5800 1600 -5800 5300 2000 5900 "anode" "2" "onsolder,square"]
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ElementLine [5500 8000 4300 10600 1000]
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ElementLine [5500 -9600 5500 8000 1000]
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ElementLine [-5500 -9600 5500 -9600 1000]
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ElementLine [-5500 -9600 -5500 8000 1000]
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ElementLine [-4300 10600 -5500 8000 1000]
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ElementLine [-4300 10600 4300 10600 2000]
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)
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Element["" "DIP14" "uC" "unknown" 160000 40000 17000 5000 3 100 ""]
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(
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Pin[0 0 6000 3000 6600 2800 "VCC" "1" "square"]
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Pin[0 10000 6000 3000 6600 2800 "PB0 (CLKI" "2" ""]
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Pin[0 20000 6000 3000 6600 2800 "PB1" "3" ""]
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Pin[0 30000 6000 3000 6600 2800 "PB3 (RESET" "4" ""]
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Pin[0 40000 6000 3000 6600 2800 "PB2 (CKOUT" "5" ""]
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Pin[0 50000 6000 3000 6600 2800 "PA7" "6" ""]
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Pin[0 60000 6000 3000 6600 2800 "PA6 (MOSI" "7" ""]
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Pin[30000 60000 6000 3000 6600 2800 "(MISO" "8" ""]
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Pin[30000 50000 6000 3000 6600 2800 "(USCK/SCL" "9" ""]
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Pin[30000 40000 6000 3000 6600 2800 "PA3" "10" ""]
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Pin[30000 30000 6000 3000 6600 2800 "PA2" "11" "found"]
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Pin[30000 20000 6000 3000 6600 2800 "PA1" "12" "found"]
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Pin[30000 10000 6000 3000 6600 2800 "(AREF" "13" ""]
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Pin[30000 0 6000 3000 6600 2800 "GND" "14" ""]
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ElementLine [20000 -5000 35000 -5000 1000]
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ElementLine [-5000 -5000 10000 -5000 1000]
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ElementLine [35000 -5000 35000 65000 1000]
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ElementLine [-5000 65000 35000 65000 1000]
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ElementLine [-5000 -5000 -5000 65000 1000]
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ElementArc [15000 -5000 5000 5000 0 180 1000]
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)
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Element["" "SIP6" "COMM_BUS" "unknown" 80000 60000 11000 -4000 3 100 ""]
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(
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Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
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Pin[0 10000 6000 3000 6600 2800 "2" "2" ""]
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Pin[0 20000 6000 3000 6600 2800 "3" "3" ""]
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Pin[0 30000 6000 3000 6600 2800 "4" "4" ""]
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Pin[0 40000 6000 3000 6600 2800 "5" "5" ""]
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Pin[0 50000 6000 3000 6600 2800 "6" "6" ""]
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ElementLine [-5000 5000 5000 5000 1000]
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ElementLine [5000 0 5000 50000 2000]
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ElementLine [-5000 0 -5000 50000 2000]
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ElementArc [0 50000 5000 5000 0 180 2000]
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ElementArc [0 0 5000 5000 180 180 2000]
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)
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Rat[70000 70000 0 50000 70000 0 "found"]
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Rat[10000 70000 0 10000 80000 0 ""]
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Rat[10000 80000 0 28400 64200 1 ""]
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Rat[90000 130000 1 90000 130000 0 "via"]
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Rat[80000 110000 1 80000 100000 0 ""]
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Rat[100000 100000 0 110000 100000 1 ""]
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Rat[110000 60000 1 100000 60000 1 ""]
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Rat[160000 70000 1 160000 80000 0 ""]
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Rat[28400 75800 1 30000 77400 0 "found"]
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Layer(1 "component")
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(
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Line[70000 40000 70000 30000 1000 2000 "found,clearline"]
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Line[20000 50000 10000 50000 2500 2000 "clearline"]
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Line[10000 80000 10000 100000 1000 2000 "clearline"]
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Line[70000 90000 30000 90000 1000 2000 "found,clearline"]
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Line[30000 90000 30000 77400 1000 2000 "found,clearline"]
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Line[110000 60000 110000 110000 1000 2000 "clearline"]
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Line[190000 30000 190000 40000 1000 2000 "clearline"]
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Line[30000 77400 28400 75800 1000 2000 "found,clearline"]
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Line[28400 64200 28400 51600 1000 2000 "clearline"]
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Line[140000 60000 160000 60000 1000 2000 "clearline"]
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Line[50000 40000 60000 40000 1000 2000 "found,clearline"]
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Line[50000 70000 50000 40000 1000 2000 "found,clearline"]
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Line[120000 90000 160000 90000 1000 2000 "clearline"]
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Line[70000 30000 30000 30000 1000 2000 "found,clearline"]
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Line[30000 30000 30000 40000 1000 2000 "found,clearline"]
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Line[20000 40000 30000 40000 1000 2000 "found,clearline"]
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Line[10000 50000 10000 70000 1000 2000 "clearline"]
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Line[60000 50000 60000 70000 1000 2000 "clearline"]
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Line[30000 50000 20000 50000 1000 2000 "clearline"]
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Line[120000 60000 130000 60000 1000 2000 "clearline"]
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Line[120000 80000 160000 80000 1000 2000 "clearline"]
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Line[130000 50000 160000 50000 1000 2000 "clearline"]
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Line[110000 50000 90000 50000 1000 2000 "clearline"]
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Line[130000 60000 130000 50000 1000 2000 "clearline"]
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Line[10000 100000 39896 100000 1000 2000 "clearline"]
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Line[39896 100000 40547 99349 1000 2000 "clearline"]
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Line[28400 51600 30000 50000 1000 2000 "clearline"]
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Line[70000 70000 70000 98802 1000 2000 "found,clearline"]
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Line[70000 98802 70547 99349 1000 2000 "found,clearline"]
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Line[20000 40000 10000 40000 2500 2000 "found,clearline"]
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Line[200000 20000 200000 70000 1000 2000 "found,clearline"]
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Line[110000 40000 70000 40000 1000 2000 "found,clearline"]
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Line[100000 100000 100000 120000 1000 2000 "clearline"]
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Line[160000 120000 160000 100000 1000 2000 "clearline"]
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Line[100000 30000 190000 30000 1000 2000 "clearline"]
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Line[200000 70000 190000 70000 1000 2000 "found,clearline"]
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Line[120000 70000 140000 70000 1000 2000 "clearline"]
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Line[140000 70000 140000 60000 1000 2000 "clearline"]
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Line[80000 80000 80000 60000 1000 2000 "clearline"]
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Line[80000 60000 110000 60000 1000 2000 "clearline"]
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Line[120000 40000 160000 40000 1000 2000 "clearline"]
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Line[170000 130000 170000 90000 1000 2000 "clearline,rubberend"]
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Line[100000 120000 160000 120000 1000 2000 "clearline"]
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Line[80000 100000 100000 100000 1000 2000 "clearline"]
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Line[80000 110000 90000 110000 1000 2000 "clearline"]
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Line[90000 110000 90000 130000 1000 2000 "clearline"]
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Line[90000 130000 170000 130000 1000 2000 "clearline"]
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Line[190000 50000 180000 50000 1000 2000 "clearline"]
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Line[180000 50000 180000 130000 1000 2000 "clearline"]
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)
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Layer(2 "solder")
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(
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Line[190000 100000 190000 110000 1000 2000 "clearline"]
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Line[150000 70000 150000 50000 1000 2000 "clearline"]
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Line[100000 60000 100000 30000 1000 2000 "clearline"]
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Line[60000 40000 60000 20000 1000 2000 "found,clearline"]
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Line[190000 80000 200000 80000 1000 2000 "clearline"]
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Line[170000 90000 190000 90000 1000 2000 "clearline,rubberend"]
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Line[200000 80000 200000 120000 1000 2000 "clearline"]
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Line[190000 60000 170000 60000 1000 2000 "found,clearline"]
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Line[190000 110000 150000 110000 1000 2000 "clearline"]
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Line[150000 110000 150000 100000 1000 2000 "clearline"]
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Line[160000 70000 150000 70000 1000 2000 "clearline"]
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Line[170000 30000 110000 30000 1000 2000 "found,clearline"]
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Line[60000 20000 200000 20000 1000 2000 "found,clearline"]
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Line[110000 30000 110000 40000 1000 2000 "found,clearline"]
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Line[150000 50000 120000 50000 1000 2000 "clearline"]
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Line[200000 120000 120000 120000 1000 2000 "clearline"]
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Line[170000 60000 170000 30000 1000 2000 "found,clearline"]
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||||
Line[120000 120000 120000 110000 1000 2000 "clearline"]
|
||||
Line[150000 100000 120000 100000 1000 2000 "clearline"]
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||||
Line[180000 130000 90000 130000 1000 2000 "clearline"]
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||||
Line[90000 130000 90000 90000 1000 2000 "clearline"]
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Line[90000 90000 80000 90000 1000 2000 "clearline"]
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)
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Layer(3 "GND")
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(
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@ -827,3 +1080,112 @@ Layer(9 "silk")
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Layer(10 "silk")
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(
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)
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NetList()
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(
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Net("CURRENT_CONTROL_LOW" "(unknown)")
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(
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Connect("Q1-1")
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Connect("R2-2")
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Connect("uC-11")
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)
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Net("GND_LED" "(unknown)")
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||||
(
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Connect("D1-2")
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Connect("D2-2")
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||||
)
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Net("GND_uC" "(unknown)")
|
||||
(
|
||||
Connect("COMM_BUS-4")
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||||
Connect("COMM_BUS-5")
|
||||
Connect("COMM_BUS-6")
|
||||
Connect("CONF-5")
|
||||
Connect("CONF-7")
|
||||
Connect("CONF-9")
|
||||
Connect("CONF-11")
|
||||
Connect("CONF-13")
|
||||
Connect("CONF-15")
|
||||
Connect("uC-14")
|
||||
)
|
||||
Net("MASTER_SLAVE" "(unknown)")
|
||||
(
|
||||
Connect("CONF-6")
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Connect("uC-2")
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||||
)
|
||||
Net("PWM_LED" "(unknown)")
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||||
(
|
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Connect("CONF-3")
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Connect("R1-1")
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)
|
||||
Net("PWM_uC" "(unknown)")
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||||
(
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Connect("CONF-4")
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Connect("uC-5")
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||||
)
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Net("SCL" "(unknown)")
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||||
(
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Connect("COMM_BUS-1")
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Connect("uC-9")
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||||
)
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Net("SDA" "(unknown)")
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(
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Connect("COMM_BUS-2")
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Connect("uC-7")
|
||||
)
|
||||
Net("uC_CONF_A" "(unknown)")
|
||||
(
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Connect("CONF-8")
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Connect("uC-3")
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||||
)
|
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Net("uC_CONF_B" "(unknown)")
|
||||
(
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Connect("CONF-10")
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Connect("uC-4")
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)
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Net("uC_CONF_C" "(unknown)")
|
||||
(
|
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Connect("CONF-12")
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Connect("uC-6")
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||||
)
|
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Net("uC_CONF_D" "(unknown)")
|
||||
(
|
||||
Connect("CONF-14")
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||||
Connect("uC-8")
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||||
)
|
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Net("uC_CONF_E" "(unknown)")
|
||||
(
|
||||
Connect("CONF-16")
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||||
Connect("uC-10")
|
||||
)
|
||||
Net("uC_CONF_SERIAL" "(unknown)")
|
||||
(
|
||||
Connect("COMM_BUS-3")
|
||||
Connect("uC-13")
|
||||
)
|
||||
Net("unnamed_net1" "(unknown)")
|
||||
(
|
||||
Connect("D2-1")
|
||||
Connect("L1-1")
|
||||
Connect("Q1-3")
|
||||
)
|
||||
Net("unnamed_net2" "(unknown)")
|
||||
(
|
||||
Connect("Q1-2")
|
||||
Connect("R1-2")
|
||||
)
|
||||
Net("unnamed_net3" "(unknown)")
|
||||
(
|
||||
Connect("D1-1")
|
||||
Connect("L1-2")
|
||||
)
|
||||
Net("VCC_HIGH" "(unknown)")
|
||||
(
|
||||
Connect("CONF-1")
|
||||
Connect("R2-1")
|
||||
Connect("uC-12")
|
||||
)
|
||||
Net("VCC_uC" "(unknown)")
|
||||
(
|
||||
Connect("CONF-2")
|
||||
Connect("uC-1")
|
||||
)
|
||||
)
|
||||
|
|
Loading…
Add table
Reference in a new issue